Publications

 

1.     A.K. Dutta, Non-destructive testing of semiconductor materials using infrared piezobirefringence, 1st Annual Materials Science & Engineering Technical Paper Session, Birmingham, Al, Sep. 29-30, 1987.

 

2.     A.K. Dutta, P.K. Ajmera & B. Huner, Characterization of defects in semiconductor materials using infrared piezobirefringence, 4th International Workshop on the Physics of Semiconductor Devices, Madras, India, Dec. 10-15, 1987.

 

3.     P.K. Ajmera, B. Huner, A.K. Dutta, & C.S. Hartley, Simulation and observation of infrared piezobirefringent images in diametrically compressed semiconductor disks, Applied Optics, Vol. 27, No. 4, pp. 752-757, 1988 (click here).

 

4.     A.K. Dutta, P.K. Ajmera, & B. Huner, Non-destructive testing using infrared piezobirefringence, Final Report, US Army Research Office (Contract No. DAAG29-84-K-0153), July 1988 (click here).

 

5.     A.K. Dutta, P.K. Ajmera, & B. Huner, Piezobirefringence effect in GaAs discs subjected to diametrical compression, Journal of Applied Physics, Vol. 65, No. 12, pp. 5230-5232, 1989 (click here).

 

6.     A.K. Dutta & P.K. Ajmera, Characterization of defects in semiconductor materials by infrared piezobirefringence, IEEE Southeastcon, New Orleans, La, Apr. 1-4, pp. 1066-1071, 1990 (click here).

 

7.     A.K. Dutta & P.K. Ajmera, Simulation and observation of the images of dislocations in (100) silicon using infrared piezobirefringence, Journal of Applied Physics, Vol. 69, No. 11, pp. 7411-7418, 1991 (click here).

 

8.     S. Hariharan & A.K. Dutta, An improved quasi-two-dimensional model for short-channel MOSFETs, Solid-State Electronics, Vol. 38, No. 4, pp. 861-866, 1995 (click here).

 

9.     M.R. Kumar, A.K. Dutta & P.K. Chatterjee, Discrete component realization of a laser driver circuit for use in high-speed fiber optic communication systems, National Symposium on Fiber Optic Communication, Networking and Sensors, IIT Kanpur, India, Dec. 8-9, pp. C-19 – C-32, 1995.

 

10.   Soumyo Dutta & A.K. Dutta, Study of interface stresses in heterostructures using infrared piezobirefringence, Journal of Applied Physics, Vol. 80, No. 12, pp. 6984-6990, 1996 (click here).

 

11.   A.K. Dutta, High speed receiver circuit designs for fiber optic communications, IETE Journal of Education, Vol. 38, Nos. 3 & 4, pp. 213-223, 1997.

 

12.   A.K. Dutta, On the output impedance of a BJT Wilson current source, Microelectronics Journal, Vol. 29, No. 3, pp. 67-70, 1998 (click here).

 

13.   Devendra Deshpande & A.K. Dutta, A new unified model for submicron MOSFETs, Microelectronics Journal, Vol. 29, No. 8, pp. 565-570, 1998 (click here).

 

14.   S.B. Thakare & A.K. Dutta, A new improved model for subthreshold slope for submicron MOSFETs, Microelectronics Journal, Vol. 31, No. 2, pp. 105-111, 2000 (click here).

 

15.   J.S. Kolhatkar & A.K. Dutta, A new substrate current model for submicron MOSFETs, IEEE Transactions on Electron Devices, Vol. 47, No. 4, pp. 861-863, 2000 (click here).

 

16.   J.S. Kolhatkar & A.K. Dutta, A new mobility model to explain the transconductance overshoot effect observed in ultra-short channel length MOSFETs, Solid-State Electronics, Vol. 44, No. 4, pp. 691-696, 2000 (click here).

 

17.   Biranchinath Sahu & A.K. Dutta, Automatic synthesis of CMOS operational amplifiers: a fuzzy optimization approach, 15th International Conference on VLSI Design and 7th Asia South Pacific Design Automation Conference (IEEE), Bangalore, India, Jan. 7-11, pp. 366-371, 2002 (click here).

 

18.   Biranchinath Sahu and A.K. Dutta, A fuzzy logic based approach for parametric optimization of MOS operational amplifiers, Microelectronics Journal, Vol. 33, No. 3, pp. 253-264, 2002 (click here).

 

19.   Girish Kurkure and A.K. Dutta, A novel adaptive biasing scheme for CMOS op-amps, Journal of Semiconductor Technology and Science, Vol. 5, No. 3, pp. 168-172, 2005 (click here).

 

20.   Dipanjan Basu and A.K. Dutta, A compact ys-based MOSFET model incorporating quantum mechanical effects, Solid-State Electronics, Vol. 50, No. 7-8, pp. 1299-1309, 2006 (click here).

 

21.   Vaskar Sarkar and A.K. Dutta, An accurate, analytical, and technology-mapped definition of the surface potential at threshold and a new postulate for the threshold voltage of MOSFETs, Solid-State Electronics, Vol. 50, No. 11-12, pp. 1814-1821, 2006 (click here).

 

22.   Imon Mondal and A.K. Dutta, An analytical gate tunneling current model for MOSFETs having ultrathin gate oxides, IEEE Transactions on Electron Devices, Vol. 55, No. 7, pp. 1282-1292, 2008 (click here).

 

23.   B. Pavan Kumar Yadav and A.K. Dutta, An analytical model of the first Eigen energy level for MOSFETs having ultrathin gate oxides, Journal of Semiconductor Technology and Science, Vol. 10, No. 3, pp. 203-212, 2010 (click here).

 

24.   Rahul Pandey and A.K. Dutta, A unified analytical one-dimensional surface potential model for partially depleted (PD) and fully depleted (FD) SOI MOSFETs, Journal of Semiconductor Technology and Science, Vol.11, No.4, pp. 262-271, 2011 (click here).

 

25.   Rahul Pandey and A.K. Dutta, An analytical one-dimensional current-voltage model for FD SOI MOSFETs including the effect of substrate depletion, Semiconductors, Vol. 47, No.9, pp. 1224-1231, 2013 (click here).

 

26.   Soumya Jain and A.K. Dutta, Resistance-based approach for drain current modeling in graphene FETS (GFETs), IEEE Transactions on Electron Devices, Vol. 62, No. 12, pp. 4313-4321, 2015 (click here).

 

27.   Vishwa Prabhat and A.K. Dutta, Analytical surface potential and drain current models of dual-metal-gate double-gate tunnel FETs (DMG-DGTFETs), IEEE Transactions on Electron Devices, Vol. 63, No. 5, pp. 2190-2196, 2016 (click here). (17th and 22nd most downloaded paper in IEEE TED in April’16 and May’16 respectively)

 

28.   Arnab Pal and A.K. Dutta, Analytical drain current modeling of double-gate tunnel field-effect transistors (DGTFETs), IEEE Transactions on Electron Devices, Vol. 63, No. 8, pp. 3213-3221, 2016 (click here). (9th most downloaded paper in IEEE TED in July’16)

 

29.   Sudip Ghosh, Avirup Dasgupta, Sourabh Khandelwal, A.K. Dutta, and Yogesh Singh Chauhan, Physics based modeling of gate current including Fowler-Nordheim tunneling in GaN HEMT, 3rd IEEE International Conference on Emerging Electronics (ICEE), IIT Bombay, December 27-30, 2016.

 

30.   Raksharam and A.K. Dutta, A unified analytical drain current model for double-gate junctionless field-effect transistors including short channel effects, Solid-State Electronics, Vol. 130, pp. 33-40, 2017 (click here). (appeared in the list of most downloaded papers in Solid-State Electronics in May-July’17)

 

31.   Nadim Ahmed and A.K. Dutta, Analytical models for the 2DEG concentration and gate leakage current in AlGaN/GaN HEMTs, Solid-State Electronics, Vol. 132, pp. 64-72, 2017 (click here). (appeared in the list of most downloaded papers in Solid-State Electronics in April-Dec’17)

 

32.   Somashekar Swamy and A.K. Dutta, New analytical models for the 2DEG density and drain current in AlGaN/GaN HEMTs, IEEE Transactions on Electron Devices, Vol. 65, No. 3, pp. 936-944, 2018 (click here). (appeared in the list of most downloaded papers in IEEE TED in Feb-Mar’18)

 

33.   Himani Jawa and A.K. Dutta, A new approach to RF small-signal modeling of MOSFETs, Semiconductor Science & Technology, Vol. 34, No. 11, 115024, 2019 (click here).

 

34.   Kshitiz Tyagi, Amit Verma, and A.K. Dutta, Modeling of the gate tunneling current in MFIS NCFETs, IEEE Transactions on Electron Devices, Vol. 68, No. 11, pp. 5886-5893, 2021 (click here).

 

35.   Anuj Paharia and A.K. Dutta, A new surface potential based analytical model for MFIS NCFETs, IEEE Transactions on Electron Devices, Vol. 69, No. 2, pp. 870-877, 2022 (click here).

 

36.   Rohit Yadav and A.K. Dutta, A new charge based analytical model for the gate current in GaN HEMTs, IEEE Transactions on Electron Devices, Vol. 69, No. 4, pp. 2210-2213, 2022 (click here).

 

37.   Wajid Manzoor, A.K. Dutta, and Yogesh Singh Chauhan, Analytical approximation of surface potential and analysis of C-V characteristics of bulk MOSFETs at cryogenic temperatures, Microelectronics Journal, Vol. 129, 105586, 2022 (click here).

 

38.   Wajid Manzoor, Ravi Goel, A.K. Dutta, and Yogesh Singh Chauhan, Improved surface potential based compact model for bulk MOSFETs at cryogenic temperatures, 6th IEEE International Conference on Emerging Electronics (ICEE), IISc Bangalore, Dec. 11-14, 2022.

 

39.   Yash Agrahari and A.K. Dutta, An empirical model for bulk electron mobility in Si at cryogenic temperatures, Silicon, Vol. 15, No. 1, pp. 563-570, 2023 (click here).

 

40.   Anuj Paharia and A.K. Dutta, A theoretical study of Negative Capacitance Field-Effect Transistors (NCFETs) using Ferroelectrics having 1st- and 2nd-order phase transitions, Physica Status Solidi (A), Vol. 220, No. 6, 2200663, 2023 (click here).

 

41.   Wajid Manzoor, A.K. Dutta, and Yogesh Singh Chauhan, Analysis and modeling of negative transconductance in zero-threshold voltage MOSFETs at cryogenic temperatures, IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Bangalore, India, Mar. 3-6, pp.1-3, 2024 (click here).

 

42.   Wajid Manzoor, A.K. Dutta, Girish Pahwa, Nisha Manzoor, Chenming Hu, and Yogesh Singh Chauhan, Extending standard BSIM-BULK model to cryogenic temperatures, IEEE Transactions on Electron Devices, Vol. 71, No. 8, pp. 4510-4516, 2024 (click here).

 

43.   Wajid Manzoor, A.K. Dutta, and Yogesh Singh Chauhan, A comprehensive study of threshold voltage extraction techniques from room to cryogenic temperatures, IEEE Journal of Electron Devices Society (JEDS), Vol. 13, pp. 915-923, 2025 (click here).

 

44.   Nisha Manzoor, Wajid Manzoor, Debashish Nandi, A.K. Dutta, and Yogesh Singh Chauhan, Compact modeling of kink effect in bulk MOSFETs at cryogenic temperatures, IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Hong Kong, Mar. 9-12, pp.1-3, 2025 (click here).

 

45.   Wajid Manzoor, Nisha Manzoor, Yawar Hayat Zarkob, Debashish Nandi, A.K. Dutta, and Yogesh Singh Chauhan, Benchmarking of the BSIM-BULK for cryo-CMOS design, IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Hong Kong, Mar. 9-12, pp.1-3, 2025 (click here).

 

46.   Nisha Manzoor, Wajid Manzoor, Debashish Nandi, A.K. Dutta, and Yogesh Singh Chauhan, Characterization and modeling of fully-depleted SOI varactors with independently-controlled front- and back-gates for RF applications, IEEE Transactions on Electron Devices, Vol. 72, No. 7, pp. 3371-3378, 2025 (click here).

 

47.   Yogesh Singh Chauhan, Wajid Manzoor, and A.K. Dutta, Advancing standard BSIM-BULK for cryo-CMOS applications, Invited Paper, International Compact Modeling Conference (ICMC), San Francisco, California, Jun. 26-27, 2025 (click here).

 

48.   Nisha Manzoor, Debashish Nandi, Chetan Kumar Dabhi, A.K. Dutta, and Yogesh Singh Chauhan, Modeling of gate-induced-drain-leakage under low electric field in FDSOI MOSFETs, IEEE Transactions in Electron Devices, Vol. 72, No. 10, pp. 5321-5327, 2025 (click here).

 

49.   Nisha Manzoor, Debashish Nandi, A.K. Dutta, and Yogesh Singh Chauhan, An all-region gate-induced-drain-leakage current model for FDSOI MOSFETs valid down to cryogenic temperatures, 7th International Conference on Emerging Electronics (ICEE), Bengaluru, India, Dec 13-16, 2025.

 

50.   Nisha Manzoor, Debashish Nandi, Dinesh Rajasekharan, Tanvir H. Morshed, V. Vinothkumar, Sayeef Salahuddin, A.K. Dutta, and Yogesh Singh Chauhan, Physical Insights and Modeling of the Interaction of the Dual-Gates in the Subthreshold Region of UTBB-FDSOI MOSFETs, under review.

 

51.   Tejas Ketkar, Wajid Manzoor, Shubham Sahay, and A.K. Dutta, Impact of exponential band-tail states on characteristics of bulk MOSFETs at cryogenic temperatures, under preparation.

 

 

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