EE698I: Mixed-signal IC design

Lectures

• Lecture 1: Sampling, anti-alias filter, oversampling, reconstruction; Into to Quantization (video)

• Lecture 2: Measuring SQNR; Refresher on Fourier analysis; Evolution of discrete Fourier transform (video)

• Lecture 3: DFT of sinusoid; Spectral leakage; Need for windowing; Choice of input freq. to test ADC (video)

• Lecture 4: Differential & Integral non-linearity (DNL, INL); MOS as switch; Effect of finite ON resistance (video)

• Lecture 5: Switch non-linearity; Gate bootstrapped switch; Thermal noise (video)

• Lecture 6 (part 1): Charge injection, bottom plate sampling, deriving the switched-capacitor amplifier (video)

• Lecture 6 (part 2): Analyzing switched capacitor ckts using KCL & understanding charge conservation (video)

• Lecture 7: Charge conservation: more examples; Switched capacitor integrators (delayed & delay-free) (video)

• Lecture 8: Correlated double sampling (CDS); Correlated level shifting (CLS); Effect of finite gain error & DC offset of the opamp (video)

• Lecture 9 (part 1): Using an OTA vs an opamp in switched capacitor ckts; Settling & slewing with OTA (video)

• Lecture 9 (part 2):Noise in switched cap(SC) ckts with OTA; Mean-squared noise in SC ckts without OTA (video)

• Lecture 10: Deriving the StrongARM latch; Introduction to Flash ADC (video)

• Problem discussion; Deriving the Floating inverter amplifier (FIA); Dynamic amplifiers for SC circuits (video)

• Lecture 11: Flash ADC: Reference subtraction; Dynamic premplifier; Offset calibration; exploiting offset as the reference voltage for flash (video)

• Lecture 12 (part 1): Flash ADC summary; Common-mode rejection in floating inverter amp FIA & integrator type dynamic amp (video)

• Lecture 12 (part 2): Interpolating Flash ADC; Time interpolation in flash ADC; Some recent examples in literature (video)

• Lecture 13: Time-interleaved ADCs; Offset, gain and timing mismatches (video)

• Lecture 14: SAR ADC; Capacitive DAC switching schemes; Monotonic switching; Energy efficiency (video)

• Lecture 15 (part 1): Asynchronous SAR ADC; Implementing the asynchronous logic (video)

• Lecture 15 (part 2): SAR ADC: Redundancy to tackle DAC settling; Condition for redundancy; Example calculations (video)

• Lecture 16: SAR ADC: Loop unrolled SAR; Split C-DAC; Digital calibration; Buffer embedded SAR (video)

• Lecture 17: Pipelined ADC; Redundancy to tackle comparator offset; 1.5-bit (M+0.5) bit stage (video)

• Lecture 18: Pipelined-Flash: Multiplying DAC(MDAC) non-idealities: gain error, non-linearity; DAC non-linearity (video)

• Lecture 19 (part 1): Pipelined ADC: Digital calibration: Using a PN dither & correlation; Gradient descent (video)

• Lecture 19 (part 2): Split ADC structure for digital calibration of pipelined ADCs & time-interleaved ADCs (video)

• Lecture 19 (part 3): Pipelined ADC: Design choices and trade-offs (video)

• Lecture 20: Noise-shaping ADC: Deriving the Error-feedback structure; Intro to delta-sigma modulator (video)

• Lecture 21: Delta-sigma modulator: Higher order NTF; Maximum stable amplitude (MSA); Controlling OBG (video)

• Lecture 22 (part 1): Delta-sigma modulator: system-level design; simple design example in MATLAB (video)

• Lecture 22 (part 2): Intuition behind the loop filter coefficients; Circuit implementation of MOD1 (video)

• Lecture 23: Switched-capacitor loop filter; DAC mismatch; Data weighted averaging (DWA) (video)

• Lecture 24 (part 1): Motivation for Continuous time delta-sigma modulator (CTDSM): Implicit anti-aliasing (video)

• Lecture 24 (part 2): VCO-based ADC: basic introduction (video)

• Lecture 24 (part 3): Schrier Figure of Merit (FoM) for ADCs (video)

References

This course will not be based on any specific textbook. Instead, the students will be required to grasp the concepts presented during the lectures. Some portion of the course will be based on papers published in the IEEE Journal of solid-state circuits (JSSC). The relevant papers will be shared as and when required. 

Switched capacitor circuits

• Papers on Correlated level shifting (CLS) (link) (link)
• Original paper on Correlated double sampling to boost opamp gain (link)

• Razavi's SSCS articles on Gate-boostrapped switch (link) (link)

• Razavi's SSCS articles on StrongARM latch (link) (link)
• Razavi's SSCS article on Flash ADC (link)
• Early paper on time-based interpolation (link)
• Recent JSSC exploiting time interpolation using a TDC (link)

• Paper on monotonic DAC switching scheme (JSSC paper link) (VLSI Symposium paper link)
• Redundancy (JSSC paper link)
• Loop unrolled SAR first paper(first paper) (Modern loop unrolled SAR) (TI loop-unrolled SAR in SerDes)
• Buffer embedded SAR (first work, 2015 JSSC) (Buffer embedded SAR, CICC 2019)

• Dither-based digital calibration (first paper by Galton in 2000) (JSSC 2003) (JSSC 2022)
• Split ADC calibration (first paper, JSSC 2005) (JSSC 2022)

• Basics of sampling & quantization, spectral analysis & DFT.

• Switched-capacitor circuits: Sample-and-hold, integrators, filters, and noise in switched-capacitor circuits.

• Comparator basics: evolution of comparator architectures, Flash ADC, interpolation & folding flash.

• Successive approximation register based (SAR) ADC: Implementation, DAC switching techniques (monotonic, constant common-mode, etc.,), error correction in SAR (redundancy & non-binary weighted DAC).

• Piplelined ADC: introduction, digital reconstruction, circuit implementation.

• Noise--shaping: error-feedback, CIFF, delta-sigma modulators, architectural choices, and basic circuit implementation.

• Introduciton to emerging ADC topologies: Time/frequency/phase domain ADCs, continuous-time ADCs, non-uniform sampled ADCs.