R. S. Ashwin Kumar, "Analysis of Stability, Noise, and Design Guidelines For a Cascaded Floating-Inverter Amplifier," in IEEE Transactions on Circuits and Systems II: Express Briefs, 2024(doi: 10.1109/TCSII.2024.3387039).
R. S. Ashwin Kumar, N. Krishnapura, and P. Banerjee "Analysis and Design of a Discrete-Time Delta-Sigma Modulator Using a Cascoded Floating-Inverter-Based Dynamic Amplifier," IEEE Journal of Solid-State Circuits (IEEE JSSC). (vol. 57, no. 11, pp. 3384-3395, Nov. 2022. (doi: 10.1109/JSSC.2022.3171790).
R. S. Ashwin Kumar and N. Krishnapura, "Multi-channel Analog-to-Digital Conversion Using a Delta-Sigma Modulator Without Reset and a Modulated Sinc-Sum Filter," IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2021. (doi: 10.1109/TCSI.2021.3094679). Also presented at the IEEE International Symposium on Integrated Circuits and Systems (ISICAS) 2021.
Chithra, A. Narayanan, R. S. Ashwin Kumar and N. Krishnapura, "Auto-zeroing Static Phase Offset in DLLs using a Digitally Programmable Sensing Circuit", IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 68, no. 6, pp. 1788-1792, June 2021. (doi: 10.1109/TCSII.2021.3049134).
R. S. Ashwin Kumar and N. Krishnapura, "Multi-Channel Analog-to-Digital Conversion Techniques Using a Continuous-time Delta-Sigma Modulator Without Reset," IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 67, no. 11, pp. 3693-3703, Nov. 2020. (doi: 10.1109/TCSI.2020.3013691). Also presented at the IEEE International Symposium on Integrated Circuits and Systems (ISICAS) 2020.
R. S. Ashwin Kumar, D. Behera and N. Krishnapura, "Reset-Free Memoryless Delta–Sigma Analog-to-Digital Conversion," IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 65, no. 11, pp. 3651-3661, Nov. 2018, doi: 10.1109/TCSI.2018.2854707. (doi: 10.1109/TCSI.2018.2854707). Also presented at the IEEE International Symposium on Integrated Circuits and Systems (ISICAS) 2018.
Conference papers
R. S. A. Kumar, Ankit Sinha, V. K. Shukla, "Split Reservoir Capacitor Stacking for Correlated-Level-Shifting in Floating Inverter Amplifiers", IEEE International Symposium on Circuits and Systems (ISCAS), 2026.
R. S. Ashwin Kumar, "Using the Miller Theorem in LPTV Networks to Analyze Miller N-Path Filters", IEEE International Symposium on Circuits and Systems (ISCAS), 2025 (doi: 10.1109/ISCAS56072.2025.11043976).
Rakesh N, R. S. Ashwin Kumar, "Low Noise Low Power Readout Circuit for Capacitance Based MEMS Accelerometers ", IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2024, (doi: 10.1109/APCCAS62602.2024.10808937).
R. S. A. Kumar, "Flip-Around Level-Shifting for Switched-Capacitor Amplifiers to Improve the Closed-Loop Settling of Floating-Inverter Amplifiers", IEEE International Symposium on Circuits and Systems (ISCAS), 2024 (Won 2nd best paper award in ISCAS 2024). (doi: 10.1109/ISCAS58744.2024.10558405).
R. S. Ashwin Kumar, "Using the Miller Theorem to Analyze Two-Stage Miller-Compensated Opamps," IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 2938-2942 (doi: 10.1109/ISCAS48785.2022.9937345).
R. S. Ashwin Kumar, "A Discrete-Time Delta-Sigma Modulator With Relaxed Driving Requirements And Improved Anti-Aliasing", IEEE International Symposium on Circuits and Systems (ISCAS) 2021 (doi: 10.1109/ISCAS51556.2021.9401336).
R. S. A. Kumar and N. Krishnapura, "A 2-Channel ADC Using a Delta-Sigma Modulator Without Reset & a Modulated-Sinc-Sum Filter," ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), Cracow, Poland, 2019, pp. 365-368. (doi: 10.1109/ESSCIRC.2019.8902610).
R. S. A. Kumar, D. Behera and N. Krishnapura, "A Low Power Multi-Channel Input Delta-Sigma ADC Without Reset,” IEEE International Conference on VLSI Design and International Conference on Embedded Systems (VLSID) 2017, (doi: 10.1109/VLSID.2017.85).
Patents granted
R. S. Ashwin Kumar and Nagendra Krishnapura, "Multi-Channel ADC Realization Using a Delta-Sigma Modulator Without Reset And a Modulated Sinc-Sum Filter", India patent application, Patent no. 495533.
Chithra, A Narayanan, R. S. Ashwin Kumar, and N. Krishnapura, “Auto-Zeroing Static Phase Offset in DLLs Using a Digitally Programmable Sensing Circuit”, Patent no. 501606.