R.S. Ashwin Kumar

Assistant Professor,

Dept. of Electrical Engg.,

IIT Kanpur.

Office: WL 120

Tel: +91-512-259-2165

email: ashwinrs@iitk.ac.in

I work in the area of analog & mixed-signal integrated circuits and signal processing.

In particular, I specifically work in analog-to-digital converters, sensor front-ends, and direct-digitization in sensor and RF receivers.

Published work

Dynamic amplifiers:

Closed-loop switched-capacitor circuits require an opamp with a high dc gain. Although classic opamp topologies are well-suited, it is not highly efficient. This is because, a switched-capacitor load demands spiky currents only for a short-while after switching. Hence, it is more power-efficient to use an amplifier whose bias current changes dynamically. In addition, it is desired that the amplifier not consume any power when the clock is disabled. This requirement gave rise to the evolution of dynamic amplifiers. Floating-inverter amplifier (FIA) is one such dynamic amplifier with serveral interesting features! Refer to the below papers to learn more!

R. S. A. Kumar, "Analysis of Stability, Noise, and Design Guidelines For a Cascaded Floating-Inverter Amplifier," in IEEE Transactions on Circuits and Systems II: Express Briefs, doi: 10.1109/TCSII.2024.3387039.
Rakesh N, R. S. Ashwin Kumar, "Low Noise Low Power Readout Circuit for Capacitance Based MEMS Accelerometers ", IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2024.
R. S. A. Kumar, "Flip-Around Level-Shifting for Switched-Capacitor Amplifiers to Improve the Closed-Loop Settling of Floating-Inverter Amplifiers", IEEE International Symposium on Circuits and Systems (ISCAS), 2024 (Won 2nd best paper award in ISCAS 2024).
R. S. A. Kumar, N. Krishnapura, and P. Banerjee "Analysis and Design of a Discrete-Time Delta-Sigma Modulator Using a Cascoded Floating-Inverter-Based Dynamic Amplifier," IEEE Journal of Solid-State Circuits (IEEE JSSC). (vol. 57, no. 11, pp. 3384-3395, Nov. 2022, doi: 10.1109/JSSC.2022.3171790).

Multi-channel reset-free delta-sigma ADCs

Many sensor applications require precise digitization of multiple analog signals, requiring a multi-channel ADC. This is typically realized by sequentially feeding the inputs from multiple channels (multiplexing) to a single ADC and then de-serializing the ADC output. Delta-sigma ADCs are the usual choice for realizing a high-resolution ADC. A DS-ADC relies on filtering (long-term averaging) the noise to reduce its effect within the signal bandwidth of interest. As a result of this filtering, the ADC has a long memory of its past inputs. Hence, when inputs from multiple channels are fed sequentially, the outputs after de-serializing will have severe cross-talk. Although this could be solved by resetting the ADC, this periodic reset compromises the long-term averaging, reducing the signal-to-noise ratio.

The following are some of the techniques I proposed to prevent or cancel cross-talk without resetting the DS-ADC.

R. S. A. Kumar and N. Krishnapura, "Multi-Channel Analog-to-Digital Conversion Using a Delta-Sigma Modulator Without Reset and a Modulated-Sinc-Sum Filter," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 1, pp. 186-195, Jan. 2022, doi: 10.1109/TCSI.2021.3094679.
R. S. A. Kumar and N. Krishnapura, "Multi-Channel Analog-to-Digital Conversion Techniques Using a Continuous-Time Delta-Sigma Modulator Without Reset," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 11, pp. 3693-3703, Nov. 2020, doi: 10.1109/TCSI.2020.3013691.
R. S. A. Kumar and N. Krishnapura, "A 2-Channel ADC Using a Delta-Sigma Modulator Without Reset & a Modulated-Sinc-Sum Filter," ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), Cracow, Poland, 2019, pp. 365-368, doi: 10.1109/ESSCIRC.2019.8902610.
R. S. A. Kumar, D. Behera and N. Krishnapura, "Reset-Free Memoryless Delta–Sigma Analog-to-Digital Conversion," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 11, pp. 3651-3661, Nov. 2018, doi: 10.1109/TCSI.2018.2854707.
R. S. A. Kumar, D. Behera and N. Krishnapura, "A Low Power Multi-Channel Input Delta-Sigma ADC Without Reset,” IEEE International Conference on VLSI Design and International Conference on Embedded Systems (VLSID) 2017, doi: 10.1109/VLSID.2017.85.

Circuit theory & other miscellaneous techniques

R. S. Ashwin Kumar, "Using the Miller Theorem to Analyze Two-Stage Miller-Compensated Opamps," 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 2938-2942 (doi: 10.1109/ISCAS48785.2022.9937345).
R. S. Ashwin Kumar, "A Discrete-Time Delta-Sigma Modulator With Relaxed Driving Requirements And Improved Anti-Aliasing", IEEE International Symposium on Circuits and Systems (ISCAS) 2021 (doi: 10.1109/ISCAS51556.2021.9401336).

Research with me!

The research work with me usually takes the following flow. After the inception and a top-level verification of an idea, we design the circuit and send it for fabrication. We then design a printed circuit board (PCB) for testing and characterizing the fabricated chip and corroborate the proposed idea with the measured results from the chip! And such a successful chip usually finds its way to a good journal or a conference!

If you are interested to work with me, mail me your CV/resume.