Mixed-signal IC design
Lectures:Â
(Will be updated from August 2024!)
Course contents
Basics of sampling & quantization, spectral analysis & DFT.
Switched-capacitor circuits: Sample-and-hold, integrators, filters, and noise in switched-capacitor circuits.
Comparator basics: evolution of comparator architectures, Flash ADC, interpolation & folding flash.
Successive approximation register based (SAR) ADC: Implementation, DAC switching techniques (monotonic, constant common-mode, etc.,), error correction in SAR (redundancy & non-binary weighted DAC).
Piplelined ADC: introduction, digital reconstruction, circuit implementation.
Noise--shaping: error-feedback, CIFF, delta-sigma modulators, architectural choices, and basic circuit implementation.
Introduciton to emerging ADC topologies: Time/frequency/phase domain ADCs, continuous-time ADCs, non-uniform sampled ADCs.
References
This course will not be based on any specific textbook. Instead, the students will be required to grasp the concepts presented during the lectures. Some portion of the course will be based on papers published in the IEEE Journal of solid-state circuits (JSSC). The relevant papers will be shared as and when required.
Switched capacitor circuits
Original paper on Correlated double sampling to boost opamp gain (link)
Gate-bootstrapped switch
Comparators & Flash ADC
Razavi's SSCS article on Flash ADC (link)
Early paper on time-based interpolation (link)
Recent JSSC exploiting time interpolation using a TDC (link)
SAR ADC
Paper on monotonic DAC switching scheme (JSSC paper link) (VLSI Symposium paper link)
Redundancy (JSSC paper link)
Loop unrolled SAR first paper(first paper) (Modern loop unrolled SAR) (TI loop-unrolled SAR in SerDes)
Buffer embedded SAR (first work, 2015 JSSC) (Buffer embedded SAR, CICC 2019)
Pipelined ADC
Dither-based digital calibration (first paper by Galton in 2000) (JSSC 2003) (JSSC 2022)
Split ADC calibration (first paper, JSSC 2005) (JSSC 2022)