Shubham Sahay, IIT Kanpur

Mamidala Jagadesh Kumar and Shubham Sahay, Lilienfeild's concept on Junction-less Field Effect Transistors, in 75th Anniversary of the Transistor, Editors: Arokia Nathan and Samar Saha, IEEE-Wiley Press, 2023.

MD Salim Equbal and Shubham Sahay, Scaling the MOSFET: Detrimental Short Channel Effects, in Nanoelectronics -: Physics, Materials and Devices, Elsevier, 2022.

Amirtha Varshini and Shubham Sahay, Impact of High-k Dielectrics on the Gate-induced Drian Leakage of Multi-gate FETs, in High-k Materials in Multi-Gate FET Devices, CRC Press, 2021.

MD Yasir Bashir, Anupam Jaiswal, Sharang Patel and Shubham Sahay, Revisiting Lateral-BTBT Gate-Induced Drain Leakage in Nanowire FETs for 1T-DRAM, IEEE Transactions on Electron Devices,,vol. 71, no. 4, pp. 2714-2720, April 2024, doi: 10.1109/TED.2024.3365773.

Munoon Jain, Rahul Kumar Singh, Musaib Rafiq and Shubham Sahay, Hybrid CMOS-Ferroelectric FET-Based Image Sensor With Tunable Dynamic Range, IEEE Transactions on Electron Devices , vol. 71, no. 1, pp. 624-629, Jan. 2024, doi:10.1109/TED.2023.3331677.

Bhogi Satya Swaroop, Ayush Saxena, and Shubham Sahay, Satisfiability Attack-resilient Camouflaged Multiple Multivariable Logic-in-Memory Exploiting 3D NAND Flash Array, IEEE Transactions on Circuits and Systems I: Regular papers,, vol. 71, no. 2, pp. 660-669, Feb. 2024, doi: 10.1109/TCSI.2023.3326332.

Jasmine Kaur, Sneh Saurabh, and Shubham Sahay, Bilayer Synthetic Antiferromagnetic Skyrmion-based Muller C-element, accepted for publication in IEEE Transactions on Electron Devices, vol. 71, no. 1, pp. 516-523, Jan. 2024, doi: 10.1109/TED.2023.3330831.

Amit Kumar and Shubham Sahay, Analytical Modeling of Threshold Voltage and Subthreshold Slope for 3D NAND Flash Memory With a Non-Uniform Doping Profile, IEEE Journal of the Electron Devices Society,, vol. 11, pp. 611-618, 2023, doi: 10.1109/JEDS.2023.3326173.

Musaib Rafiq, Tanveer Kaur, Amol Gaidhane, Yogesh Chauhan and Shubham Sahay, Ferroelectric FET-Based Time-Mode Multiply-Accumulate Accelerator: Design and Analysis, IEEE Transactions on Electron Devices,, vol. 70, no. 12, pp. 6613-6621, Dec. 2023, doi: 10.1109/TED.2023.3323261.

MD Salim Equbal, Tejas Ketkar, and Shubham Sahay, Hybrid CMOS-RRAM True Random Number Generator Exploiting Coupled Entropy sources, IEEE Transactions on Electron Devices,, vol. 69, no. 11, pp. 6446-6452, Nov. 2022, doi: 10.1109/TED.2022.3207114.

Manas Chanda, Sharang Dhar Patel, Amit Bhattacharya, and Shubham Sahay, Impact of Transport Mechanism on Binding Kinematics and Sensitivity of FET Biosensors, IEEE Transactions on Electron Devices,, doi: 10.1109/TED.2023.3281539.

Sanjay Sharma, Shubham Sahay, and Rik Dey, Parasitic Capacitance Model for Stacked Gate-all-around Nanosheet FETs, IEEE Transactions on Electron Devices,, doi: 10.1109/TED.2023.3281530.

Musaib Rafiq, Shivendra Singh Parihar, Yogesh Chauhan, and Shubham Sahay, Efficient Implementation of Max-Pooling Algorithm Exploiting History-effect in Ferroelectric-FinFETs, IEEE Transactions on Electron Devices,, vol. 69, no. 11, pp. 6446-6452, Nov. 2022, doi: 10.1109/TED.2022.3207114.

Jasmine Kaur, Sneh Saurabh, Shubham Sahay Muller C-Element Exploiting Programmable Metallization Cell for Bayesian Inference, IEEE Journal on Emerging and Selected Topics in Circuits and Systems,, vol. 12, no. 4, pp. 750-761, Dec. 2022, doi: 10.1109/JETCAS.2022.3206479.

Amit Kumar, Raushan Kumar, Shubham Sahay Analytical Modeling of 3D NAND Flash Cell with a Gaussian Doping Profile, IEEE Access,, vol. 10, pp. 85854-85863, 2022, doi: 10.1109/ACCESS.2022.3198398.

Amit Kumar, Himanshu Singh, Shubham Sahay, K. Balasubramanian, Charge Injection into Electrodeposited Cu2O From Metallic Stacks and Graphene, IEEE Transactions on Electron Devices,, vol. 69, no. 10, pp. 5755-5759, Oct. 2022, doi: 10.1109/TED.2022.3197380.

Dipanjan Sen, Sharang Dhar Patel, and Shubham Sahay, Dielectric Modulated Nanotube Tunnel Field-Effect Transistor as a Label Free Biosensor: Proposal and Investigation, IEEE Transactions on NanoBioscience,, vol. 22, no. 1, pp. 163-173, Jan. 2023, doi: 10.1109/TNB.2022.3172553.

Ayan Banerjee, Sagnik Bhattacharya, Yogesh Singh Chauhan, and Shubham Sahay, Ultra-Compact Neural Network ADC Exploiting Ferroelectric FET, TechRxiv preprint, 2022.

A. Gaidhane, R. Dangi, Shubham Sahay, Amit Verma, and Yogesh Singh Chauhan, A Computationally Efficient Compact Model for Ferroelectric FinFETs Switching with Asymmetric Non-Periodic Input Signals, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 5, pp. 1634-1642, May 2023, doi: 10.1109/TCAD.2022.3203956.

S. Pal, Shubham Sahay, W. -H. Ki and C. -Y. Tsui, 10T Soft-Error-Immune SRAM With Multi-Node Upset Recovery for Low-Power Space Applications, IEEE Transactions on Device and Materials Reliability, vol. 22, no. 1, pp. 85-88, March 2022, doi: 10.1109/TDMR.2022.3147864.

Honey Nikam, Siddharth Satyam and Shubham Sahay, Long Short-Term Memory Implementation Exploiting Passive RRAM Crossbar Array,IEEE Transactions on Electron Devices,, vol. 69, no. 4, pp. 1743-1751, April 2021, doi: 10.1109/TED.2021.3133197.

M. Bavandpour, Shubham Sahay, M. R. Mahmoodi and Dmitri Strukov, 3D-aCortex: An Ultra-Compact Energy-Efficient Neurocomputing Platform Based on Commercial 3D-NAND Flash Memories,IOP Neuromorphic Computing and Engineering, Vol. 1, pp. 014001, July 2021.

Shubham Sahay, M. Bavandpour, M. R. Mahmoodi and Dmitri Strukov, Energy-Efficient Moderate Precision Time-Domain Mixed-Signal Vector-by-Matrix Multiplier Exploiting 1T-1R Array, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, vol. 6, no. 1, pp. 18-26, June 2020.

M. Bavandpour, Shubham Sahay, M. R. Mahmoodi and Dmitri Strukov, Efficient Mixed-Signal Neurocomputing Via Successive Integration and Division, IEEE Transactions on VLSI systems, vol. 28, no. 3, pp. 823-827, Mar. 2020.

G. Musalgaonkar, Shubham Sahay, R. S.Saxena, and M. JagadeshKumar, Nanotube Tunneling FET with a Core Source for Ultra-Steep Subthreshold Swing: A Simulation Study, IEEE Transactions on Electron Devices, vol. 66, no. 10, pp. 4425-4432, Oct. 2019.

G. Musalgaonkar, Shubham Sahay, R. S.Saxena, and M. JagadeshKumar, A Line Tunneling Field-Effect Transistor Based on Misaligned Core-Shell Gate Architecture in Emerging Nanotube FETs, IEEE Transactions on Electron Devices., vol. 66, no. 6, pp. 2809-2816, Jun. 2019.

Shubham Sahay, M. Klachko, and Dmitri Strukov, Hardware Security Primitive Exploiting Intrinsic Variability in Analog Behavior of 3-D NAND Flash Memory Array, IEEE Transactions on Electron Devices, vol. 66, no. 5, pp. 2158-2164, May 2019.

Shubham Sahay, and Dmitri Strukov, A Behavioral Compact Model for Static Characteristics of 3D NAND Flash Memory, IEEE Electron Device Letters, vol. 40, no. 4, pp. 558-561, April 2019.

G. Musalgaonkar, Shubham Sahay, R. S.Saxena, and M. Jagadesh Kumar, An Impact Ionization MOSFET with Reduced Breakdown Voltage Based on Back-Gate Misalignment, IEEE Transactions on Electron Devices, vol. 66, no. 2, pp.868-875, Feb 2019.(Appeared in the list of most popular papers in the month of February 2019;

A. K. Jain, Shubham Sahay and M. Jagadesh Kumar, Controlling L-BTBT in Emerging Nanotube FETs using Dual-Material gate,IEEE Journal of the Electron Devices Society, vol. 6, pp. 611-621, June 2018. (Appeared in the list of most popular papers in the month of April, May and June 2018.

Shubham Sahay and Manan Suri, Recent Trends in Hardware Security Exploiting Hybrid CMOS-NVM Circuits, IOP Semiconductor Science and Technology, vol. 32, no. 12, pp. 123001, Oct. 2017.

N. K. Saini, Shubham Sahay, R. S. Saxena and M. Jagadesh Kumar, In0.53Ga0.47As/InP Trench Gate Power MOSFET based on impact ionization for improved performance: Design and Analysis, IEEE Transactions on Electron Devices, vol. 34, no. 11, pp. 4561-4567, Nov. 2017.

Shubham Sahay and M. Jagadesh Kumar, Comprehensive Analysis of Gate-Induced Drain Leakage in Emerging FET Architectures: Nanotube FETs vs. Nanowire FETs, IEEE Access, vol. 5, pp. 18918-18926 Dec. 2017.

Shubham Sahay and M. Jagadesh Kumar, Spacer Design Guidelines for Nanowire FETs from Gate Induced Drain Leakage Perspective, IEEE Transactions on Electron Devices, vol. 64, no. 7, pp. 3007-3015, July 2017.

Shubham Sahay and M. Jagadesh Kumar, Physical Insights into the Nature of Gate Induced Drain Leakage in Ultra-Short Channel Nanowire Field Effect Transistors, IEEE Transactions on Electron Devices, vol. 64, no. 6, pp. 2604-2610, June 2017.(Appeared in the list of most popular papers in the month of April, July, August and September 2017 and January, February, April (amongst top 10), May (amongst top 10), June (amongst top 3) and July 2018.

Shubham Sahay and M. Jagadesh Kumar, Nanotube Junctionless Field Effect Transistor: Proposal, Design and Investigation, IEEE Transactions on Electron Devices, vol. 64, no. 4, pp. 1851-1856, Apr. 2017.(Appeared in the list of most popular papers in the month of March, April and August 2017.

Shubham Sahay and M. Jagadesh Kumar, Diameter Dependency of Leakage Current in Nanowire Junctionless Field Effect Transistors, IEEE Transactions on Electron Devices, vol. 64, no. 3, pp. 1330-1335, Mar. 2017. (Appeared in the list of most popular papers in the month of January, February and April 2017.

ShubhamSahay, A. Kumar, V. Parmar, and Manan Suri, OxRAM RNG circuits exploiting multiple undesirable nanoscale phenomena, IEEE Transactions on Nanotechnology, vol. 16, no. 4, pp. 560-566, July 2017.(Appeared in the list of most popular papers in the month of January (amongst Top 4) 2017.

Shubham Sahay and M. Jagadesh Kumar, Symmetric Operation in an Extended Back Gate JLFET for Scaling to the 5 nm Regime Considering Quantum Confinement Effects, IEEE Transactions on Electron Devices, vol. 64, no. 1, pp. 21-27, Jan. 2017.(Appeared in the list of most popular papers in the month of January 2017.

Shubham Sahay and M. Jagadesh Kumar, A Novel Gate-Stack-Engineered Nanowire FET for Scaling to the Sub-10-nm Regime, IEEE Transactions on Electron Devices, vol. 63, no. 12, pp. 5055-5059, Dec. 2016. (Appeared in the list of most popular papers in the month of November and December 2016.

Shubham Sahay and M. Jagadesh Kumar, Insight into Lateral Band-to-Band-Tunneling in Nanowire Junctionless Field Effect Transistors, IEEE Transactions on Electron Devices, vol. 63, no. 10, pp. 4138-4142, Oct. 2016. (Appeared in the list of most popular papers in the month of September (amongst Top 5) and November 2016.

Shubham Sahay and M. Jagadesh Kumar, Controlling L-BTBT and Volume Depletion in Nanowire JLFETs Using Core-Shell Architecture, IEEE Transactions on Electron Devices, vol. 63, no. 9, pp. 3790-3794, Sep. 2016.(Appeared in the list of most popular papers in the month of August (amongst Top 4) and September 2016.

M. Jagadesh Kumar and Shubham Sahay, Controlling BTBT Induced Parasitic BJT Action in Junctionless FETs using a Hybrid Channel, IEEE Transactions on Electron Devices, vol. 63, no. 8, pp. 3350-3353, Aug 2016. (Appeared in the list of most popular papers in the month of June, July and August 2016.

Shubham Sahay and M. Jagadesh Kumar, Realizing Efficient Volume Depletion in SOI Junctionless FETs, IEEE Journal of the Electron Devices Society, vol. 4, no. 3, pp. 110-115, May 2016. (Appeared in the list of most popular papers in the month of February, March, April, May, June, July, August, September and November 2016.

Shubham Sahay and M. Jagadesh Kumar, Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Hetero-dielectric BOX, IEEE Transactions on Electron Devices, vol. 62, no. 11, pp. 3882-3886, Nov 2015. (Appeared in the list of most popular papers in the month of November and December 2015.

Arjun Tyagi and Shubham Sahay, Efficient Reinforcement Learning on Passive RRAM Crossbar Array, Accepted for publication in 57th IEEE International Symposium on Circuits & Systems (ISCAS) Singapore, May 2024.

MD Yasir Bashir, Pritish Sharma, and Shubham Sahay, Capacitor-less 1T-DRAM as Synaptic Element for Online Learning, Device Research Conference (DRC), Maryland, USA, June 2024.

Musaib Rafiq, MD Sajid Nazir, Swetaki Chatterjee, Yogesh Chauhan, and Shubham Sahay, A SPICE-Compatible Model for Ferroelectric GaN HEMTs, Device Research Conference (DRC), Maryland, USA, June 2024.

Siddhart Satyam, Honey Nikam, and Shubham Sahay, Energy-Efficient Implementation of Generative Adversarial Networks on Passive RRAM Crossbar Arrays, Design and Automation Conference (DAC), San Francisco, USA, June 2024.

Abhishek Kumar, Imon Mondal and Shubham Sahay, An Automatic Leakage Compensation Technique for Capacitively Coupled class-AB Operational Amplifiers, accepted for publication in Accepted for publication in 56th IEEE International Symposium on Circuits & Systems (ISCAS) Monterey, USA, May 2023.

Amit Kumar, and Shubham Sahay, Analytical Modeling of Intrinsic Threshold Voltage and Subthreshold Slope for 3D NAND Flash Memory with a Gaussian Doping Profile, accepted for publication in International Conference on Solid State Devices and Materials (SSDM), Chiba, Japan, September 2022.

Anupam Jaiswal, Sharang Dhar Patel, and Shubham Sahay, Revisiting Lateral-BTBT Gate-Induced Drain Leakage in Nanowire FETs for 1T-DRAM, Device Research Conference (DRC), Ohio, USA, June 2022.

Anupam Jaiswal, Sharang Dhar Patel, and Shubham Sahay, Design and Optimization of 1T-DRAMs Based on Nanowire FETs, IEEE NANO, Palma De Mallorca, Spain, July 2022.

Shubham Sahay*, Arman Kazemi*, Ayush Saxena, Mohammad Mehdi Sharifi, Michael Niemier and X. Sharon Hu, A Flash-Based Multi-Bit Content-Addressable Memory with Euclidean Squared Distance, accepted for publication in ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2021.

Tejas Ketkar and Shubham Sahay, Impact of Non-Idealities in RRAMs on Hardware Spiking Neural Networks, accepted for publication in IEEE Devices Technology and Manufacturing Conference (EDTM), Chengdu, March 2021.

Shubham Sahay, M. Bavandpour, M. R. Mahmoodi and Dmitri Strukov, A 2T-1R Cell Array with High Dynamic Range for Mismatch-Robust and Efficient Neurocomputing, accepted for publication in IEEE International Memory Workshop (IMW), Germany, May 2020.

M. Bavandpour, Shubham Sahay, M. R. Mahmoodi and Dmitri Strukov, Mixed-Signal Vector-by-Matrix Multiplication Circuits based on 3D-NAND Memories for Neurocomputing, accepted for publication in Design, Automation and Test Conference (DATE), France, Apr. 2020.

M. Bavandpour, Shubham Sahay, M. R. Mahmoodi and Dmitri Strukov, Mixed-Signal Neuromorphic Processors: Quo Vadis?, in IEEE SOI-3D-Subthreshold (S3S) Microelectronics Technology Unified Conference, San Francisco, Oct. 2019. (Best paper nomination)

Shubham Sahay, M. Bavandpour and Dmitri Strukov, Compact Modelling and Computing Applications of 3D NAND Flash Memory, in SRC TECHCON, Austin, Aug. 2019.

A. Kumar, Shubham Sahay and M. Suri, Switching-Time Dependent PUF Using STT-MRAM, in IEEE VLSI-D 17th International Conference on Embedded systems and 31st International Conference on VLSI Design, Pune, India, 2018.

Shubham Sahay, M. Suri, A. Kumar and V.Parmar, Hybrid CMOS-OxRAM RNG circuits, in IEEE NANO - 16th International Conference on Nanotechnology, Sendai, Japan, Aug. 2016.

Time-Domain Mixed-Signal Vector-by-Matrix Multiplier Exploiting 1T-1R Array, US Patent. (provisional application filed with M. Bavandpour and Dmitri Strukov, UC Case No. 2019-426).

Neurocomputing Platform Based on Commercial 3D-NAND Flash Memories, US Patent. (provisional application filed with M. Bavandpour, M. R. Mahmoodi and Dmitri Strukov, UC-2019-425).

Efficient Mixed-Signal Neuromorphic Computing via Successive Integration and Division, US Patent. (provisional application filed with M. Bavandpour, M. R. Mahmoodi and Dmitri Strukov, UC Case No. 2020-053).

Hardware Security Primitive Exploiting Intrinsic Variability in Analog Behavior of 3D NAND Flash Memory Array, US Patent,. (provisional application filed with Dmitri Strukov, UC Case No 2019-401)

Neuromorphic Computing: Mapping Neural Networks to Hardware in Faculty Development Program at SRM University, AP on 21st March, 2024.

Neuromorphic Computing: Mapping Neural Networks to Hardware in in a short term course titled "Neuroevolution-based Advanced Semiconductor Devices (NASD - 2024)" at BIT Mesra, Ranchi on 10th March, 2024.

Energy-efficient Computing Platforms and Hardware Security Primitives in in CeNSe Seminar Series at IISc Bangalore on 1st March, 2024.

Neuromorphic Computing: Mapping Neural Networks to Hardware in International Conference on Devices, Sensors and Systems (CoDSS) 2024 at Tezpur University on 10th February, 2024.

Energy-efficient Computing Platforms and Hardware Security Primitives in Research Scholar Forum, Department of Electronics and Electrical Engineering at IIT Guwahati on 7th February, 2024.

Brain-inspired Computing: Mapping Neural Networks to Hardware at Villa University, Male, Maldives on 15th December, 2023.

Neuromorphic Computing: Mapping Neural Networks to Hardware in IIT Kanpur-La Trobe University Research Academy Workshop at LaTrobe University, Melbourne on 28th November, 2023.

Neuromorphic Computing: Mapping Neural Networks to Hardware in IEEE MTT SBC at Jadavpur University on 25th August, 2023.

Neuromorphic Computing Platforms and Hardware Security Primitives in Faculty Seminar series at IIT Kanpur on 19th August, 2023.

Time-domain Neuromorphic Computing Platforms in workshop on Brain-inspired/Neuromorphic Computing for Responsible AI at IIT Patna on 22nd March, 2023.

Connecting the Software and Hardware Worlds: Mapping Neural Networks to Hardware in workshop on Brain-inspired/Neuromorphic Computing for Responsible AI at IIT Patna on 21st March, 2023.

Neuromorphic Bayesian Learning Hardware for Cancer Detection in workshop on Artificial Intelligence Advancements in Digital Healthcare at IIIT Una on 4th January 2023.

Exploiting Neuromorphic Networks to predict the future based on the past in IEEE EDS summer school on Emerging Devices and Circuits to Mimic Biologically Plausible Neuronal Functionalities for Neuromorphic Computing at IIITDM Kancheepuram on 20th December 2022.

Neuromorphic Computing: Mapping Neural Networks to 2D Hardware Systems in workshop on Emerging Nanomaterial-Based Devices for Future VLSI Applications at IIT (ISM), Dhanbad on 18th December 2022.

Compact Modelling and Unconventional Applications of 3D NAND Flash Memories in IEEE ICEE 2022, Bangalore on 13th December 2022.

Exploiting Neuromorphic Networks to predict the future based on the past in IEEE EDKCON 2022, Kolkata on 27th November 2022.

Reliable and Legitimate Device Characterization Using Commercial TCAD Simulators in workshop on Research Opportunities in Semiconductor Materials and Devices (ROSMD), SRM institute of science and technology, Chennai, on 20th October 2022.

Reliable and Legitimate Device Characterization Using Commercial TCAD Simulators in Faculty Development Programme (FDP) on Advancement in VLSI Interconnects and Nanoscale Devices at ABV-IIITM Gwalior on 13th October 2022

Hardware Neuromorphic Computing Platforms at IIT (BHU) Varanasi, on 22nd June 2022.

Neuromorphic Computing: Mapping Neural Networks to Hardware in research conclave on "Recent Trends and Developments in Nanotechnology", IIT Patna, on 5th May 2022.

Neuromorphic Computing Primitives and Hardware Security Platforms in IEEE WDC, Goa, on 26th March 2022.

Exploiting Neuromorphic Networks to predict the future based on the past, FDP on "Next Generation Materials and Devices", SR University Warangal on 7th January 2022.

Time-domain neuromorphic computing platforms in ATAL Faculty Development Program on "Neuronal Dynamics and Neuromorphic Computing", IIT Patna, on 10-11th December 2021.

Neuromorphic Computing: Mapping Neural Networks to Hardware in ATAL Faculty Development Program on "Nanoelectronics Devices: Materials to Applications (NDMA-2021)", IIIT Ranchi, on 8th December 2021.

Neuromorphic Computing: Mapping Neural Networks to Hardware in ATAL Faculty Development Program on "Devices and Circuits For Next-Generation Computing Architectures", G B Pant Institute of Engineering and Technology, on 26th October 2021.

Neuromorphic Computing: Mapping Neural Networks to Memristive Crossbars in Faculty Development Program on "Emerging Topics in Computing: Quantum, Microfluidic and Memristors", JIS University, on 13th August 2021.

Reliable and Legitimate Device Characterization Using Commercial TCAD Simulators in ATAL FDP on "Physics of Nanoelectronics", IIT Kanpur on 5th August 2021.

Brain-inspired computing: mapping neural networks to hardware in International Conference on Recent Innovations in Science, Engineering & Technology, Invertis University, on 23rd July 2021.

Physical Insights into the Nature of Gate-induced Drain Leakage in Emerging Nano-scale FETs in Workshop on VLSI Device and Circuit Design Tools, School of Electronics Engineering (SENSE), VIT-AP University, on 23rd June 2021.

Hardware Security Primitives Exploiting Emerging Non-volatile Memories in Faculty Development Program on "Recent Advances and Challenges in Nanoscale Devices: Design, Materials, and Applications Perspective, NIT Hamirpur on 5th June 2021.

Neuromorphic computing: mapping neural networks to hardware in Emerging Nanoscale Devices, Circuits and Their Applications, Delhi Technological University, Delhi on 11th May 2021.

Transport in Junctionless FETs in QIP course: Transport in Nanoelectronics, IIT Kanpur on 20th March 2021.

Neuromorphic computing: mapping neural networks to hardware in TEQIP-III Sponsored Online Workshop on: VLSI BASED SYSTEM DESIGN, IIIT Guwahati, Guwahati on 13th March 2021.

Compact Modeling of 3D NAND Flash Memory for Diverse Unconventional Analog Applications in MOS-AK Asia/South Pacific Workshop on 26th February 2021.

Neuromorphic computing: mapping neural networks to hardware in SCDT-FlexE Centre Weekly Seminar on 9th February 2021.

Neuromorphic Computing: Mapping Neural Networks to Hardware in ATAL Academy Faculty Development Program (Neuronal Dynamics and Neuromorphic Computing), IIT Patna, on 23rd October 2020.

Neuromorphic Computing Platforms in IEEE EDS "Technical Talk", IEEE ED MSIT SBC, MSIT and MESON, Kolkata, on 16th October 2020.

Time-domain Neuromorphic Computing Platforms in Faculty Development Program on TCAD simulation for VLSI devices, circuits and systems, Jaypee Institute of Information Technology, Noida, on 21st July 2020.

Hybrid CMOS-Emerging Memory Circuits for Neuromorphic Computing in EICT course on Artificial Intelligence - Devices to Systems, IIT Roorkee, on 29th August 2019.

NeuroComputing and Hardware Security (NeuroCHaSe) Group

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