NeuroComputing and Hardware Security (NeuroCHaSe) Group

Department of Electrical Engineering,

Indian Institute of Technology, Kanpur



The widespread and ever-increasing demand for performing in-situ inference, signal processing and other computationally intensive applications in the mobile internet-of-things (IoT) devices requires fast, compact and energy-efficient Vector-by-matrix Multipliers (VMM). Owing to the conventional von-Neumann architecture, even the most advanced digital approaches to the VMM task such as GPUs incur a significantly increased power consumption due to frequent memory access. Therefore, there is an urgent need for energy-efficient VMM circuits for inference accelerators.

Our research involves development, modelling and characterization of energy-efficient neuromorphic devices, circuits and systems based on CMOS devices and emerging non-volatile memories such as 3D-NAND Flash, RRAM, etc.



Ultra-low power and compact hardware security primitives are essential in the functional circuits of the interconnected devices and cyber-physical systems in the IoT ecosystem for protection against security vulnerabilities such as intellectual property (IP) piracy, side channel attacks, electronic counterfeiting, etc. and adversary attacks.

We exploit the inherent temporal and spatial variations in the emerging non-volatile memories as well as CMOS circuits as entropy source in designing circuits and systems which act as hardware roots of trust.



Although low precision neuromorphic computing engines based on non-von-Neumann architecture are extremely energy-efficient for applications such as inference, classification, recognition, etc. without significantly degrading their accuracy, von-Neumann computing systems are still essential for performing high-precision computing tasks such as image processing. Scaling the conventional MOSFETs beyond the 10-nm regime to augment the von-Neumann computing systems requires field-effect transistors with alternate conduction mechanisms like band-to-band tunneling, impact ionization, use of negative capacitance,etc. to surpass the Boltzmann tyranny or different device architectures such as nanowires, nanotubes, nanosheets, etc. to achieve enhanced electrostatic integrity.

We explore different approaches to mitigate the challenges faced by conventional MOSFETs while scaling to the sub-10 nm regime to augment the von-Neumann computing systems.


Co-PI : Development of energy-efficient nanoscale molecular memristors; Agency: Scheme for Transformational and Advanced Research in Sciences (STARS) ; Duration: 3 years.

Co-PI : In-Memory Computing Utilizing Ferroelectric Transistors; Agency: Scheme for Transformational and Advanced Research in Sciences (STARS) ; Duration: 3 years.


PI : Compact Modeling and Design Exploration of 3D NAND flash Memory for Hardware Security Primitives; Agency: Science and Engineering Research Board (SERB) ; Amount: Rs. 31,13,000; Duration: 2 years.

PI : Neuromorphic Accelerators and Neuro-Optimizers Based on Hybrid CMOS-RRAM Circuits; Agency: Semiconductor Research Corporation (SRC), USA ; Amount: $36,000; Duration: 3 years.

PI : IoT-Embedded Light-weight Hardware Security Primitives Utilizing Emerging Non-volatile Memories for Privacy Preserving Mutual Authentication; Agency: Centre for Cyber Security and Cyber Defence of Critical Infrastructure Innovation Hub (C3I Hub), IIT Kanpur ; Amount: Rs. 75,00,000; Duration: 3 years.

PI : Neuromorphic Accelerators Utilizing Passive RRAM Crossbar Arrays; Agency: IIT Kanpur ; Amount: Rs. 65,00,000; Duration: 1 year.

Co-PI : Special Manpower Development Programme For Chips To System Design (SMDP C2SD); Agency: Department of Electronics & Information Technology (DEITY) ; Amount: Rs. 1,47,51,000; Project Duration: 5 years; Duration as Co-PI: 29/07/21 to 30-11-2021; PI: Dr. Imon Mondal.


PI : Hardware Security Primitives Exploiting 3D Nand Flash Memory; Agency: IIT Kanpur; Amount: Rs. 25,00,000; Duration: 2 years.