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News:
- The GaAs LNA (Low Noise Amplifier), jointly developed by my group and Tagore Tech for sub-6 GHz 5G applications, is now available commercially. The LNA’s have world class performance with noise figure of 0.4dB, which belongs to the ultralow noise category.
- Our ASM-HEMT Model is now available in EDA tools - AWR Microwave Office, AMCAD-IVCAD, Keysight, Parameter Extraction Video, Silvaco-SmartSpice, Harmony, Utmost-IV.
- Press Release - Si2 Approves IC Design Simulation Standards for Gallium Nitride Devices.
- Videos of short course on Modeling and Simulation of Nano-Transistors.
- Nanoelectronics
- Development and Support of our industry standard ASM-HEMT model
- Compact modeling of semiconductor devices (Bulk/SOI MOSFET, Multigate FET, Nanowire, UTBSOI and novel devices)
- BSIM model development & support (with BSIM Group at University of California Berkeley)
- Atomistic Simulation of Nanoscale Devices
- DC, CV and RF Characterisation of MOSFETs
- Machine Learning for semicondcutor research
Ongoing Projects: Project funding/consultancy from some companies is not shown here due to confidentiality reasons.
| S. No. | Funding Agency | Project Title | PI | Co-PI | IITK Budget (Rs.) | Duration |
|---|---|---|---|---|---|---|
| 7. | MoE-STARS | In-Memory Computing Utilizing Ferroelectric Transistors | Y. S. Chauhan | S. Sahay | Approved | 3 years (2024-2026) |
| 6. | DST (Indo-Korea Collaboration) | Neuromorphic Computing andNeuro-optimizer Platforms Utilizing High-yield Passive RRAM Crossbar Arrays | S. Sahay | Y. S. Chauhan | Approved | 3 years (2024-2026) |
| 5. | INAE (Indo-Taiwan Collaboration) | Design and Technology Co-Optimization of Stacked Nanosheet RF for 6G Applications | Y. S. Chauhan | A. Lahgere | Approved | 3 years (2024-2026) |
| 4. | Science & Engineering Research Board | RF Characterization and Compact Modeling of Wide Band-Gap Gallium Nitride (GaN) Devices for the Next Generation Wireless Communication | Y. S. Chauhan | A. Lahgere | 68 Lac | 3 years (2023-2026) |
| 3. | Wavetek | RF Characterization and Modeling of GaN Transistors | Y. S. Chauhan | - | Undisclosed | 2022-2023 |
| 2. | Department of Science and Technology | Swarnajayanti Fellowship | Y. S. Chauhan | - | 2 Crore | 5 years (2019-2024) |
| 1. | Berkeley Device Modeling Center (BDMC) | Modeling of Advanced MOSFETs | Y. S. Chauhan | - | 3.2 Crore | 2016-2023 (Renewed every year) |
| S. No. | Funding Agency | Project Title | PI | Co-PI | Budget (Rs.) | Duration |
|---|---|---|---|---|---|---|
| 26. | Defence Research & Development Organization (DRDO) | Development of scalable large signal model and low noise model for GaN MMIC Design for wideband application | Y. S. Chauhan | - | 29.50 Lacs | 2022-2023 |
| 25. | Wavetek | RF Characterization and Modeling of GaN Switch | Y. S. Chauhan | - | Undisclosed | 2021-2023 |
| 24. | Maxlinear | Characterization and Modeling of Transistors | Y. S. Chauhan | - | Undisclosed | 2019-2022 |
| 23. | United States-India Science & Technology Endowment Fund (IUSSTF) | GaN based High Power LNA for 5G Applications | Y. S. Chauhan | Tagore Tech. USA | 87.50 Lac | 3 years (2019-2022) |
| 22. | Science & Engineering Research Board | Physics of Dirac and Weyl Semimetals | A. Agarwal | S. Bhowmick & Y. S. Chauhan | 28.46 Lac | 3 years (2019-2022) |
| 21. | Science & Engineering Research Board | Improving performance of power electronic circuits using GaN-HEMT devices | S. Anand | Y. S. Chauhan | 55.53 Lac | 3 years (2019-2022) |
| 20. | Defence Research & Development Organization | Development of Compact Model for DRDO-SSPL`s GaN-HEMTs | Y. S. Chauhan | - | 27.26 Lac | 3 years (2019-2022) |
| 19. | Applied Materials | Device Modeling | Y. S. Chauhan | - | Undisclosed | 2019-2020 |
| 18. | Keysight Technologies | Modeling of GaN HEMTs | Y. S. Chauhan | - | Undisclosed | 2019-2021 |
| 17. | Compact Model Coalition (Si2-CMC) | ASM-HEMT (Advanced SPICE Model for GaN HEMTs) Model | Y. S. Chauhan | S. Khandelwal | 77 Lac | 2018-2020 |
| 16. | Indian Space Research Organization | PDK Development and Modeling Support for ISRO's GaN HEMT Technology | Y. S. Chauhan | - | 36 Lac | 4 years (2018-2022) |
| 15. | DST Nanomission | Atomistic Simulation and Compact Modeling of Alternate Channel Materials for Nanoscale Devices | Y. S. Chauhan | A. Agarwal & S. Bhowmick | 76.53 Lac | 3 years (2017-2020) |
| 14. | IMPRINT | GaN HEMT based circuit design solutions and product demonstration for defense and space applications | Y. S. Chauhan | S. Anand & K. V. Srivastava | 1.39 Crore | 3 years (2017-2020) |
| 13. | Department of Science and Technology | Integration and Enablement of 0.18 micron RF-SOI Technology for Analog Mixed-Signal Applications | A. Dixit | Y. S. Chauhan, S. Chatterjee & H. S. Jattana | 1.34 Crore | 3 years (2016-2019) |
| 12. | Council of Scientific & Industrial Research | Modeling and simulation of III-V and Ge transistors for logic and power applications | Y. S. Chauhan | A. Agarwal | 18.33Lac | 3 years (2016-2019) |
| 11. | Indian Space Research Organization | Characterization and Modeling of Radiation hardened CMOS transistors for space applications | Y. S. Chauhan | - | 29.76Lac | 2 years (2016-2018) |
| 10. | Indian Space Research Organization | Design and Development of GaN Based Compact DC-DC Converter | S. Anand | Y. S. Chauhan | 29.76Lac | 2 years (2016-2018) |
| 9. | Semiconductor Research Corporation | Modeling Advanced FDSOI for IC Design | Chenming Hu | Sayeef Salahuddin and Y. S. Chauhan | ~27Lac | 2 years (2016-2017) |
| 8. | Science & Engineering Research Board | Ramanujan Fellowship | Y. S. Chauhan | - | 35 Lac | 5 years (2012-2017) |
| 7. | Indian Space Research Organization | HEMT modeling for broad temperature and frequency ranges | Y. S. Chauhan | K. V. Srivastava | ~22.6Lac | 2 years (2015-2017) |
| 6. | Semiconductor Research Corporation | Analog and RF Bulk CMOS Compact Model | Chenming Hu | Ali Niknejad and Y. S. Chauhan | 22Lac | 3 years (2013-2016) |
| 5. | IBM Corporation | IBM Faculty Award | Y. S. Chauhan | - | 6.3 Lac | 1 year (2013) |
| 4. | Semiconductor Research Corporation | Unified Compact Model of Advanced CMOS structures | Chenming Hu | Ali Niknejad and Y. S. Chauhan | 95Lac | 3 years (2013-2016) |
| 3. | Science & Engineering Research Board | Industry Oriented Device Modelling for Smart Power Integrated Circuits | Y. S. Chauhan | - | 25 Lac | 3 years (2013-2016) |
| 2. | Indian Institute of Technology Kanpur | Wafer Characterization Laboratory | Y. S. Chauhan | S. Qureshi | ~1.65 Crore | 1 year (2013-2014) |
| 1. | Indian Institute of Technology Kanpur | Computational Nanoelectronics - Modeling & Simulation of Nano-scale devices | Y. S. Chauhan | - | 25 Lac | 2 years (2012-2014) |
- Download ASM-HEMT code
- Download BSIM-CMG model
- Download BSIM-BULK (fomerly BSIM6) model
- Download BSIM-IMG model
- Download BSIM4 model
- Download BSIM-SOI model
- BSIM Group
- Compact Model Council. Video.
- Open source TCAD Resources
- Open source TCAD software
- MOS-AK
- An introduction to semiconductor physics technology and industry
- Nanohub
- NPTEL Courses
- i-MOS Project
- Predictive Technology Model (PTM) at ASU
- FinFET Modeling for IC Simulation and Design: Using the BSIM-CMG Standard
- Industry Standard FDSOI Compact Model BSIM-IMG For IC Design
- Modern Semiconductor Devices for Integrated Circuits by Chenming C. Hu
- Device Electronics for Integrated Circuits by Richard S. Muller & Theodore I. Kamins
- Semiconductor Devices & Circuits by Aloke Dutta
- Physics of Semiconductor Devices by S. M. Sze
- Fundamentals of Solid-State Electronics by C. T. Sah
- Compact Modeling: Principles, Techniques and Applications by Gennady Gildenblat
- MOSFET Models for SPICE Simulation: Including BSIM3v3 and BSIM4 by William Liu
- Compact MOSFET Models for VLSI Design by A. B. Bhattacharyya
- Charge-Based MOS Transistor Modeling: The EKV Model for Low-Power and RF IC Design by Christian C. Enz and Eric A. Vittoz
- BSIM4 and MOSFET Modeling for IC Simulation by W. Liu and Chenming Hu
- FinFETs and Other Multi-Gate Transistors (Integrated Circuits and Systems) by J.-P. Colinge
- POWER/HVMOS Devices Compact Modeling, by Wladyslaw Grabinski and Thomas Gneiting
- MOSFET Modeling for VLSI Simulation by Narain Arora