MODELING AND SIMULATION OF NANO-Transistors

(Fellow IEEE) received the Ph.D. degree in electrical engineering from IIT Bombay, Mumbai, India, in 1999.,From 2000 to 2001, he was with Bell Laboratories, Lucent Technologies, Murray Hill, NJ, USA. Since 2002, he has been with the Electrical Engineering Department, IIT Bombay, where he is currently a Full Professor. He has published over 150 articles in peer-reviewed journals and conferences and delivered invited talks at major international conferences, including IEEE IEDM and the IEEE International Reliability Physics Symposium. His current research interests include CMOS scaling, reliability, and memory devices.,Dr. Mahapatra is also a fellow of the Indian National Academy of Engineering (INAE) and the Indian Academy of Sciences (IASc) and a Distinguished Lecturer of the IEEE Electron Devices Society.

received the M.Tech. degree from IIT Kanpur in 2003 and Ph.D. degree from the École polytechnique fédérale de Lausanne, Switzerland in 2007. From 2007-2010, He was with Semiconductor Research and Development Center in IBM, where he worked on compact modeling of analog and RF bulk/SOI CMOS technologies. He was a postdoctoral researcher at Tokyo Institute of Technology in 2010 and University of California Berkekely in 2010-2012. He joined Indian Institute of Technology Kanpur in 2012, where he is currently a professor. He has written two books and published more than 200 international journal and conference publications on the physics, characterization and modeling of nanoscale semiconductor devices. He is the developer of industry standard BSIM-BULK (BSIM6), BSIM-IMG, BSIM-CMG and ASM-GaN-HEMT models.

is a faculty member in the department of electrical engineering at IIT Kanpur. His current research interests are focused on submicron MOSFET modeling and mixed-signal VLSI. He received Distinguished Teacher Award of IIT Kanpur in 2013. He is also a senior member of IEEE.

received the B.Tech. degree in electronics and electrical communication engineering from the Indian Institute of Technology, Khragpur, India, in 1987 and the Ph.D. degree in electrical engineering from University of Illinois at Urbana Champaign in 1993. Since 1993, he has been with Department of Electrical Engineering, Indian Institute of Technology, Kanpur. His research interests include organic electronics, semiconductor device modeling and analog circuit design.

received the B.Tech. and M.S. degrees in electrical engineering from the Indian Institute of Technology Madras, India, in 1990 and 1993, respectively. He received the Ph.D. degree in electrical engineering from University of California Berkeley in 1998. He was Staff Engineer and later Advisory Engineer at IBM Microelectronics, Hopewell Junction New York during 1998 to 2004. Since 2004, he has been with Department of Electrical Engineering, Indian Institute of Technology Kanpur. His research interests include Organic Solar Cells.

is a faculty member in the department of electrical engineering at Indian Institute of Technology Delhi since 2013. He works on design, modeling, processing and characterization of CMOS and solar cell devices. Prior to joining IITD, he worked at IBM Semiconductor Research and Development Center (SRDC) for more than 6 years as a senior technical leader in enablement and TCAD groups. Before IBM, he worked at IMEC Leuven in CMOS device integration group for 5 years and got a Ph.D. degree from KU Leuven, Belgium in 2007. He has 6 US patents and more than 50 publications in apex international conferences and journals.

is an associate professor at IIT Kanpur. He was a Marie Curie postdoctoral researcher, with Prof. Rosario Fazio and Dr. Marco Polini, at the QTI group at Scuola Normale Superiore in Pisa, Italy. He is a theoretical condensed matter physicist and works on quantum many body effects and transport properties of low dimensional quantum systems. He is also involved in atomistic simulation and modeling of nanoscale devices and materials. He was also an adjunct faculty at HRI Allahabad.

received B.Tech. degree from IIT BHU in 2007 and Ph.D. from Cornell University, USA in 2015. Currently he is an assistant professor at Indian Institute of Technology Kanpur. His interests are Thin film growth, Epitaxy, Semiconductor Device Fabrication, Electron Transport and, Oxide Semiconductors.

is an Assistant Professor in the Department of Electrical Engineering at IIT Jodhpur. He received the PhD degree from IIT Kanpur in 2017. From 2016-2019, he worked as Center Manager, Berkeley Device Modeling Center, University of California, Berkeley, US. He is co-developer of the industry standard compact models for planar as well as 3D transistors (BSIM-BULK/BSIM4/BSIM-CMG). His research is focused on the investigation of next generation energy efficient devices, advanced CMOS architecture for sub-3 nm nodes, HV device modeling and emerging memory technologies for AI/ML applications. He is the recipient of two IEEE best paper awards, listed twice in IEEE EDS list of golden reviewer’s and has delivered invited talks on compact modeling techniques in reputed international modeling workshops and meetings like workshop on compact modeling (WCM), MOS-AK, BDMC and Compact model coalition (CMC) meetings.

received the M.Tech. and Ph.D. degrees in electrical engineering from the Indian Institute of Technology, Kanpur, India, in 2004 and 2007, respectively. After the Ph.D. degree, he worked with the GE Global Research Centre Bangalore for one year in 2008. At GE, he contributed significantly on wireless power transfer, magneto-caloric refrigerator, perambulatory stroke detection, and subsea communication. He is a faculty member in the Department of Electrical Engineering, Indian Institute of Technology, Kanpur, India since 2009. His research interests include RF circuit design, meta-materials, microwave filters and antennas, dielectric resonators, and finite-difference time-domain (FDTD) techniques.