Dr. Avinash Lahgere

Assistant Professor

P K Kelkar Fellow 2026

Department of Electrical Engineering

Indian Institute of Technology Kanpur, India

Lab Logo
Prof Photo

Avinash Lahgere

Assistant Professor
Department of Electrical Engineering
Indian Institute of Technology Kanpur

Address:Engineering Science Building-2 (ESB-2), Room No. - 606,
IIT Kanpur, India, 208016

Email:alahgere@iitk.ac.in

TelePhone: +91-512-679-2302

EDCL Core Research Areas

We are a research group in the Electrical Engineering (EE) department at the Indian Institute of Technology, Kanpur. Our research is in the field of science and technology of semiconductor devices and circuits, with the focus on advances in the von Neumann computing field such as low-power, low-voltage, beyond-CMOS logic and memory devices and associated materials. The core research areas of our group are: (a) Discovery and optimization of new generation high-performance nanoscale devices and exploration of their circuit-level behavior, (b) Power-Performance-Per-Area (PPA) benchmarking, (c) Emerging volatile/non-volatile memories and their reliability perspective, and (d) analog/RF device and circuit design for 5G/6G applications.

I am looking for highly motivated students with strong research interest and academic background to join our EDCL group and work on interesting reserach areas realted to CMOS devices and circuits. Interested students can email their CV with a brief discussion about the research problem they would like to investigate.
Updates
  • June 2026 - Our collaborative work on IGZO TFTs has been accepted in APL Electronic Devices, Congratulation to all
  • June 2026 - Dr. Lahgere recieved P K Kelkar 2026 fellowship from IIT Kanpur for outstading researchCongratulation, Dr. Lahgere
  • March 2026 - Our work on Negative Capacitance based DRAM has been accepted in IEEE Transactions on Electron Devices, Congratulation, Moqueet
  • Jan 2026 - Our work on Soft Error Analysis on NSFET and FSFET has been accepted in IEEE Transactions on Electron Devices, Congratulation, Hafeez
  • Dec 2025 - Our work on Evaluation of Radiation Resilience, Performance, and Vmin of Sub-3nm FSFET based SRAM Arrays has been accepted in IEEE Transactions on Computers, Congratulation, Hafeez

Experience

Year Organisation Designation Responsibilities
2022–Present IIT Kanpur Assistant Professor Teaching and Research
2021–2022 GlobalFoundries Member of Technical Staff Advanced nodes (12 nm, 14 nm, 22FDX, 28 nm) Spice and RF compact modeles
2017-2021 GlobalFoundries Principal Engineer Advanced nodes (12 nm, 14 nm, 22FDX, 28 nm) Spice and RF compact modeles

Administrative Responsibilities

  1. Co-PI : Semiconductor Device Characterization Lab (Added worth more than 200 Lakhs equipment to the existing facility)
  2. Coordinator : Department Placement (2023 – present)
  3. Chairman : IEEE EDS IIT Kanpur Chapter (2026 – present)
  4. Excom Member : IETE Kanpur Center (2026 – present)
  5. Coordinator : MVLSI PG Admission (2023 – 2025)
  6. Member : Department Budget Committee IIT Kanpur (2024 – 2025)
  7. Member : Department Review Committee IIT Kanpur (2023)
  8. Vice Chairman : IEEE EDS IIT Kanpur Chapter (2023 – 2026)

Collaboration